UNITY_X4.ABL.txt //============================================================ // // NAME // UNITY_X4 -- Unity X4 (PPMC8240/PPMC8245) miscellany PAL // // DESCRIPTION // UNITY_X4 collects miscellaneous logic on the Unity X4 into // one device. // // COPYRIGHT // Copyright 2000 by Motorola Inc. // All Rights Reserved. // Motorola RISC Applications // Written by Gary Milliorn // risc10@email.sps.mot.com // // REVISION // 1.0 - GWM - 20000127 - Original // //-----------------------------------------------------------module unity //unity device // pin pin pin pin pin pin pin pin pin pin pin pin pin pin pin pin pin pin pin pin rcs2_ rcs0_ rcs1_ progsel romsel lclrst_ // cop_hrst_ pcirst_ cop_trst_ sysrsten_ cs0_ // // irdy_ ramled romled pciled statled 'P22V10C'; 1; 2; 3; 4; 5; 6; 7; 8; 9; 10; 11; 12; 13; 14; 15; 16; 17; 18; 19; 20; // // // // // // // // // // // // // // // // // // // // Page 1 NC ROM chip select #2. ROM chip select #0. ROM chip select #1. Programming mode select. Local Boot-ROM select. Local reset strobe (switch). NC Reset from COP port. Reset from PCI bus. JTAG reset from COP port. Allow COP reset to reset system. Memory bank 0 selected. NC NC PCI initiator ready. RAM activity LED. ROM activity LED. PCI activity LED. Status LED (selectable). UNITY_X4.ABL.txt sysrst_ // cpu_hrst_ cpu_trst_ nc rcs1_out_ rcs0_out_ pin pin pin pin pin pin pin 21; 22; 23; 24; 25; 26; 27; // // // // // // // System reset. NC CPU reset output. CPU JTAG reset output. NC ROM #1 chip select. ROM #0 chip select. //-----------------------------------------------------------equations // Set the chip-selects for the local ROMs. The following table will describe // the details: // // ======= ====== + ========= ========= + ================= ======================== // PROGSEL ROMSEL | RCS0_OUT_ RCS1_OUT_ | MODE DESCRIPTION // ======= ====== + ========= ========= + ================= ======================== // 0 0 | RCS2_ RCS1_ | Alternate Program PCI can program ROM1 through RCS1 // 0 1 | RCS1_ RCS2_ | Program Normal PCI can program ROM0 through RCS1 // 1 0 | RCS1_ RCS0_ | Alternate Mode Boot ROM1, backup is ROM0 // 1 1 | RCS0_ RCS1_ | Normal Mode Boot ROM0, backup is ROM1 // ======= ====== + ========= ========= + ================= ======================== rcs0_out_ = !( (!rcs0_ # (!rcs1_ # (!rcs1_ # (!rcs2_ ); & & & & ( progsel ( progsel (!progsel (!progsel & romsel)) & !romsel)) & romsel)) & !romsel)) rcs1_out_ = !( & & & & ( progsel ( progsel (!progsel (!progsel & !romsel)) & romsel)) & !romsel)) & romsel)) (!rcs0_ # (!rcs1_ # (!rcs1_ # (!rcs2_ ); // The processor can be reset from PCI, the local reset controller, // or the COP port. cpu_hrst_ = !(!pcirst_ # !cop_hrst_ # !lclrst_); // The JTAG TRST* pin is driven when the CPU is being reset, or when the COP // connector pin is asserted, but NOT cop_hrst_. Page 2 UNITY_X4.ABL.txt cpu_trst_ = !(!pcirst_ # !lclrst_ # !cop_trst_); // SYSRST* is a PPMC pin which is optionally driven. It will reset the // carrier board from the COP port or from the local reset switch, if // enabled. sysrst_ = !((!cop_hrst_ # !lclrst_) & !sysrsten_); // Create LED activity monitors. The LED outputs are active low, and are // also asserted during HRESET* (for testing purposes). romled ramled pciled = !(!rcs0_ = !(!cs0_ = !(!irdy_ # # # (!cpu_hrst_ (!cpu_hrst_ (!cpu_hrst_ # # # !lclrst_)); !lclrst_)); !lclrst_)); // The status LED can be whatever we want (hooked up to the PAL). // Currently it monitors the other ROM chip selects, but other possibilities // are to monitor the trigger, prog mode, etc. statled // Unused output. nc end = !(!rcs1_ # !rcs2_ # (!cpu_hrst_ = 0; Page 3 # !lclrst_));